The invention relates to a non-conductive substrate forming a strip or a panel on which a multiplicity of carrier elements is formed, in particular for installation in a chipcard, in which one side of the substrate is provided with conductive contact surfaces that lie within an outer contour line determining a size of a carrier element.
A carrier element which is cut out of such a substrate is known from FIGS. 8 and 9 of Published European Patent Application 0 671 705 A2, corresponding to U.S. Pat. No. 5,598,032. That carrier element is provided for installation in a chipcard which can be operated either with contacts through the use of a number of contact surfaces or else in a contact-free manner through the use of an antenna coil, for example through the use of an induction coupling.
Carrier elements for chipcards are used to secure the semiconductor chip mechanically, and they also have the contact surfaces necessary to make contact with the chip. They are used both in chipcards which are purely of the contact type, so that access to the semiconductor chip is possible only through the contact surface, and in so-called combined cards in which contact-free access is additionally possible through the use of conductor loops in the card or on the carrier element or the chip. The conductor loops are connected to coil terminals of the semiconductor chip for that purpose.
Such carrier elements are usually not manufactured individually but rather in large numbers on a long strip or a panel which has a large area and is made of nonconductive material. The strip, which is referred to below as a substrate, or the panel, is firstly structured, for example by punching cut-outs, and is then lined on one side with a copper foil that is subsequently structured, for example by etching, so that the contact surfaces for the individual carrier elements are formed. All of the conductive structures are firstly electrically conductively connected to one another through the use of narrow lines, in order to be able to treat the surface galvanically.
The semiconductor chips are mounted on the side of the substrate lying opposite the contact surfaces and are electrically connected to the contact surfaces through the use of bonding wires through the cut-outs. Before functional testing of the semiconductor chips which is carried out while still in the strip or panel, the narrow lines are cut through the use of punching so that the contact surfaces are electrically insulated from one another. In the carrier element of Published European Patent Application 0 671 705 A2, corresponding to U.S. Pat. No. 5,598,032, the coil terminals of the semiconductor chip are connected through cut-outs in the substrate to contact surfaces on the side of the substrate lying opposite the chip. The ends of an antenna coil which is to be connected are likewise connected to two of those contact surfaces through cut-outs provided therefor in the substrate. The contact surfaces therefore serve as connection elements between the coil and the semiconductor chip. However, that has the disadvantage of making the coil terminals of the semiconductor chip accessible from the contact-surface side, even after the carrier elements are detached.
It is accordingly an object of the invention to provide a nonconductive substrate forming a strip or a panel on which a multiplicity of carrier elements is formed, which overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type, in which coil terminals of a semiconductor chip to be mounted are accessible from a contact-surface side as long as the carrier element is still in the strip or panel and in which such access possibility is denied after detachment.
With the foregoing and other objects in view there is provided, in accordance with the invention, a nonconductive, metal-lined, substrate in the shape of a strip or a panel on which a multiplicity of carrier elements is formed, in particular for installation on a chipcard, comprising one side of the substrate having an outer contour line determining a size of a carrier element, and conductive contact surfaces disposed within the outer contour line; another side of the substrate having conductor structures forming at least contact fields or elements, within the outer contour line, for at least one coil to be contacted and at least one semiconductor chip; and the substrate having cut-outs formed therein outside each outer contour line, the cut-outs providing access to coil terminals of the semiconductor chip for testing purposes from the one side of the substrate having the contact surfaces, as long as the carrier element is still in the strip or in the panel.
As a result it is possible to test the semiconductor chip as long as the carrier element is not yet cut out of the strip or the panel. The cut-outs in the substrate permit access to the chip side of the substrate from the contact-surface side. However, if the carrier element is cut out of the strip or panel, the cut-outs are no longer a component of the carrier element since they lie outside its outer contour. Thus, when the carrier element is detached, access to the coil terminals of the semiconductor chip is no longer possible from the contact-surface side. When the carrier element is introduced into a card, and thus access to the coil terminals is then only possible in a contact-free manner through the connected antenna, it is not possible for the contact-free data transmission to be listened into, disrupted, accessed electrically or tampered with from the contact-surface side.
In accordance with another feature of the invention, there are provided relatively small additional contact surfaces disposed outside the outer contour line on the one substrate side having the contact surfaces, the cut-outs forming plated-through interconnection holes connected to the conductor structures and each connected to a respective one of the relatively small additional contact surfaces.
In accordance with a further feature of the invention, in order to make the access to the coil terminals of the semiconductor chip for test purposes as simple as possible, the cut-outs are covered with conductive surfaces which are connected to the conductor structures to which the semiconductor chip or chips and the coil or coils are connected. The test tips can then easily be placed on the surface through the cut-outs.
In accordance with a concomitant feature of the invention, the cut-outs on the contact-surface side of the substrate are covered with a conductive surface which is connected through the cut-outs to the conductor structures on the chip side of the substrate through the use of plated-through interconnection holes. The plated-through interconnection holes can entirely fill the cut-outs in this case or else only cover their walls.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a nonconductive substrate forming a strip or a panel on which a multiplicity of carrier elements is formed, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.